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Cadence(上海楷登电子科技有限公司)招聘Principal Application Engineer- Tensilica IP

  • 工作地点:深圳-福田区
  • 招聘人数:1人
  • 薪资待遇:20000-25000元/月
  • 发布日期:2019-03-14
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职位描述:

Position Description:

1. As the member of the APAC Teilica IP Field Applicatio Engineering (FAE) Team, you will participate in driving technical and business campaign success with industry leading semiconductor and system companies.

2. Undetand Cadence’s end customer’s IP needs and provide front line technical support in Pre-Sales and Post-Sales process.

3. Champion the customer needs and work with Sales Team, R&D and Product Marketing to develop competitive and creative technical solutio to win campaig

4. Be a key contributor driving product road map direction for our next generation products

Position Requirements:

1. BS degree in Electrical Engineering/Computer Science or related field

2. At least 5+ yea of SoC and/or embedded software or DSP algorithm design experience

3. Have strong customer facing skills to be able to establish technical & management credibility with the key technical decision make

4. Have experience and/or knowledge of one or more of Digital Audio, DSP, imaging or computer vision technologies

5. Previous experience with DSP processor core (Teilica Xtea is preferred) or derivatives is highly desirable

6. . Experience with DSP & CPU architectures desirable – including architectural, software or HW/Debug related

7. Experience of embedded software process for DSP development is beneficial, particularly for embedded DSP core architectures

If you have interest,please send your update CV to

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Cadence(上海楷登电子科技有限公司)

  • 所属行业:计算机软件
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